def fin62
mylsm-lsm-store@0.6.0.1 · src/hub_sha/core.bend:3247
import mylsm-lsm-store@0.6.0.1/src/hub_sha/core.bend as Core
import Base
import mylsm-lsm-store@0.6.0.1/src/hub_sha/state.bend as S
3247
3248def fin62(
3249 +t0: U32,
3250 +t1: U32,
3251 +t2: U32,
3252 +t3: U32,
3253 +t4: U32,
3254 +t5: U32,
3255 +t6: U32,
3256 +t7: U32,
3257 +t8: U32,
3258 +t9: U32,
3259 +t10: U32,
3260 +t11: U32,
3261 +t12: U32,
3262 +t13: U32,
3263 +t14: U32,
3264 +t15: U32,
3265 +t16: U32,
3266 +t17: U32,
3267 +t18: U32,
3268 +t19: U32,
3269 +t20: U32,
3270 +t21: U32,
3271 +t22: U32,
3272 +t23: U32,
3273 +t24: U32,
3274 +t25: U32,
3275 +t26: U32,
3276 +t27: U32,
3277 +t28: U32,
3278 +t29: U32,
3279 +t30: U32,
3280 +t31: U32,
3281 +t32: U32,
3282 +t33: U32,
3283 +t34: U32,
3284 +t35: U32,
3285 +t36: U32,
3286 +t37: U32,
3287 +t38: U32,
3288 +t39: U32,
3289 +t40: U32,
3290 +t41: U32,
3291 +t42: U32,
3292 +t43: U32,
3293 +t44: U32,
3294 +t45: U32,
3295 +t46: U32,
3296 +t47: U32,
3297 +t48: U32,
3298 +t49: U32,
3299 +t50: U32,
3300 +t51: U32,
3301 +t52: U32,
3302 +t53: U32,
3303 +t54: U32,
3304 +t55: U32,
3305 +t56: U32,
3306 +t57: U32,
3307 +t58: U32,
3308 +t59: U32,
3309 +t60: U32,
3310 +t61: U32,
3311 +byte_length: Nat,
3312 +extra: Nat,
3313 state: S.State
3314) -> S.State:
3315 fips_compress16(pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), pack(0, 0, 0, 0), len_hi(byte_length), len_lo(byte_length),
3316 extra, fips_compress16(pack(t0, t1, t2, t3), pack(t4, t5, t6, t7), pack(t8, t9, t10, t11), pack(t12, t13, t14, t15), pack(t16, t17, t18, t19), pack(t20, t21, t22, t23), pack(t24, t25, t26, t27), pack(t28, t29, t30, t31), pack(t32, t33, t34, t35), pack(t36, t37, t38, t39), pack(t40, t41, t42, t43), pack(t44, t45, t46, t47), pack(t48, t49, t50, t51), pack(t52, t53, t54, t55), pack(t56, t57, t58, t59), pack(t60, t61, 128, 0),
3317 extra, state))