def AmlResource.encode

bend-osdev-acpi@0.1.1.0 · aml_resource.bend:294

import Base
import bend-osdev-bytes@0.1.1.0/bytes.bend as B

294def AmlResource.encode(r: AmlResource) -> B.Octets:
295  match r:
296    case AmlRIrq{m, f}:
297      B.Octets.append(res.b([35]), B.Octets.append(B.Octets.le16(m), res.b([f])))
298    case AmlRDma{m, f}:
299      res.b([42, m, f])
300    case AmlRIo{dc, mn, mx, al, l}:
301      B.Octets.concat([res.b([71, dc]), B.Octets.le16(mn), B.Octets.le16(mx), res.b([al, l])])
302    case AmlRFixedIo{b, l}:
303      B.Octets.concat([res.b([75]), B.Octets.le16(b), res.b([l])])
304    case AmlRMem32{wr, mn, mx, al, l}:
305      res.lenc(133, B.Octets.concat([res.b([wr]), B.Octets.le32(mn), B.Octets.le32(mx), B.Octets.le32(al), B.Octets.le32(l)]))
306    case AmlRMem32Fixed{wr, b, l}:
307      res.lenc(134, B.Octets.concat([res.b([wr]), B.Octets.le32(b), B.Octets.le32(l)]))
308    case AmlRAddr{+bits, k, f, tf, AmlRange{g, mn, mx, t, l}}:
309      res.lenc(res.addr.tag(bits), B.Octets.concat([res.b([k, f, tf]), res.w(bits, g), res.w(bits, mn), res.w(bits, mx), res.w(bits, t), res.w(bits, l)]))
310    case AmlRExtIrq{f, +irqs}:
311      res.lenc(137, B.Octets.concat([res.b([f, U32.from_nat(List.length(&2, U32, irqs))]), res.irqs.enc(irqs)]))
312    case AmlROther{+t, +d}:
313      res.other(U32.is_lt(t, 128), t, d)