Problems.osy_g: def of unified-nsga-iii@0.2.2.0
Import: import unified-nsga-iii@0.2.2.0/problems.bend as Problems
Lines 551-564 of unified-nsga-iii@0.2.2.0/problems.bend: https://jend.leeeet.dev/read.txt?path=unified-nsga-iii@0.2.2.0/problems.bend&start_line=551&end_line=564

import Base
import unified-nsga-iii@0.2.2.0/util.bend as Util

# pymoo divisors, then negated so a positive value is a violation.
def osy_g(+x: List<&2, F32>) -> List<&2, F32>:
  +x0 = Util.get_f32(x, 0n)
  +x1 = Util.get_f32(x, 1n)
  +x2 = Util.get_f32(x, 2n)
  +x3 = Util.get_f32(x, 3n)
  +x4 = Util.get_f32(x, 4n)
  +x5 = Util.get_f32(x, 5n)
  F32.neg(F32.div(F32.sub(F32.add(x0, x1), 2.0), 2.0))
    <> F32.neg(F32.div(F32.sub(F32.sub(6.0, x0), x1), 6.0))
    <> F32.neg(F32.div(F32.add(F32.sub(2.0, x1), x0), 2.0))
    <> F32.neg(F32.div(F32.add(F32.sub(2.0, x0), F32.mul(3.0, x1)), 2.0))
    <> F32.neg(F32.div(F32.sub(F32.sub(4.0, F32.square(F32.sub(x2, 3.0))), x3), 4.0))
    <> [F32.neg(F32.div(F32.sub(F32.add(F32.square(F32.sub(x4, 3.0)), x5), 4.0), 4.0))]

Uses (9):
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.add
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.div
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.mul
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.neg
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.square
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=F32.sub
  https://jend.leeeet.dev/definition.txt?path=Base/base.bend&name=List
  https://jend.leeeet.dev/definition.txt?path=unified-nsga-iii@0.2.2.0/util.bend&name=get_f32